CS207 Digital Logic

Fall 2022

Instructors

Lecture

Lab

  • Dr. James Jianqiao YU 余剑峤
    • 16:20—18:10 every Wed. at Room 508, Lecture Hall #3
      • TA: Kaiyue WU (12232398) and Lidan TAN (12232423)
  • Ms. Wei WANG 王薇
    • 10:20—12:10 every Fri. at Room 509, Lecture Hall #3
      • TA: Jiefang LIN (12011543) and Junwen AN (12012109)

Course Description

This is a foundational course in digital design that aims to provide an understanding of the fundamental concepts, circuits in digital design, and expose students to the mainstream approaches and technologies used in digital design. Digital logic is the representation of signals and sequences of a digital circuit through numbers. It is the basis for digital computing and provides a fundamental understanding on how circuits and hardware communicate within a computer. Digital logic is typically embedded into most electronic devices, including calculators, computers, and watches. This field is utilized by many careers that work with computers and technology. Although most modern logic design is now achieved with computerized methods, this course covers the essential building blocks upon which modern techniques were developed. This course introduces the core logical operations and demonstrates elementary methods to design logic circuits to achieve a desired function. This course also introduces the fundamentals of combinational and sequential circuits, with their high-level implementations as demonstrations. This course allows students to gain hands-on experience by building computer hardware through the use of algorithms and simple inputs. They learn how simple inputs of ones and zeros can be used to store information on computers, including documents, images, sounds, and videos.Students should be able to demonstrate an in-depth knowledge of the fundamental concepts and issues and the engineering principles involved in digital design and be able to design a series of combinational and sequential circuits. In addition, they should demonstrate through hands-on experimentation knowledge of the digital design process using HDLs.

Logistics

Course Materials

There is no required text for this course. Lecture notes and lab sheets will be posted periodically on this page. There are three reference textbooks:

  • Digital Design: With an Introduction to the Verilog HDL, VHDL, and SystemVerilog by M. Morris Mano et al.
  • Digital Principles and Logic Design by A. Saha and N. Manna.
  • Digital Logic Design by B. Holdsworth and C. Woods.

Coursework

Labs will be organized every week starting from the first one and a few coding questions need to be solved. There will be four written assignments, a mid-term and a final examination. The assignments will focus on digital logic theory. We try very hard to make questions unambiguous, but some ambiguities may remain. Ask if confused or state your assumptions explicitly. Reasonable assumptions will be accepted in case of ambiguous questions.

Grade Breakdown

  • 20% assignments
    • 5% for each assignment.
    • No late submission is allowed without formal approval from the lecturer before deadline.
    • No re-submission is allowed for student reasons, e.g., corrupted file uploaded.
  • 10% Mid-term examination
  • 40% Final examination
  • 5% Lecture attendance
    • There will be quiz questions during random lectures. You need to submit a photo of your answer to Sakai.
  • 5% Lab attendance
  • 20% Lab project

Schedule and Syllabus

Date Description
Lecture #1 Sept. 7th, 2022 (Wed.) Course Introduction
Binary Numbers
Lecture #2 Sept. 14th, 2022 (Wed.) Boolean Algebra and Logic Gates
Lecture #3 Sept. 21st, 2022 (Wed.) Gate‐Level Minimization
Lecture #4 Sept. 28th, 2022 (Wed.) Two‐Level Implementation
Deadline Oct. 4th, 2022 (Tue.) Assignment 1 Due
Lecture #5 Oct. 12th, 2022 (Wed.) Combinational Logic
Lecture #6 Oct. 19th, 2022 (Wed.) Combinational Logic (cont’d)
Assignment 1 Analysis
Lecture #7 Oct. 26th, 2022 (Wed.) Latches and Flip-flops
Deadline Nov. 1st, 2022 (Sun.) Assignment 2 Due
Lecture #8 Nov. 2nd, 2022 (Wed.) Assignment 2 Analysis
Synchronous Sequential Logic
Mid-term Exam Nov. 9th, 2022 (Wed.) Lecture #1—#7
Lecture #9 Nov. 16th, 2022 (Wed.) Synchronous Sequential Logic (cont’d)
Lecture #10 Nov. 23th, 2022 (Wed.) Arithmetic Circuits
Deadline Nov. 29th, 2022 (Tue.) Assignment 3 Due
Lecture #11 Nov. 30th, 2022 (Wed.) Assignment 3 Analysis
Registers
Lecture #12 Dec. 7th, 2022 (Wed.) Registers (cont’d)
Counters
Lecture #13 Dec. 14th, 2022 (Wed.) Counters (cont’d)
Event Week of Dec. 14th Project Midway Inspection
Deadline Dec. 20th, 2022 (Tue.) Assignment 4 Due
Lecture #14 Dec. 21st, 2022 (Wed.) Assignment 4 Analysis
Programmable Logic Devices
Lecture #15 Dec. 28th, 2022 (Wed.) Revision
Event Week of Dec. 28th Project Final Inspection